High-Speed Mixed-Signal IC Design

  • From specification to working silicon – block-based or turnkey
  • Based on CMOS processes, from 180 (mostly analog) to 28-nm (mostly digital)
  • Package and PCB co-design if relevant
  • Architecture, system, and circuit design
  • Verification methodology includes system-level, chip-level, and circuit-level
  • Analog physical implementation
  • Physical verification and post-layout functional verification
  • Design-for-test (DFT) based on analog test port and/or based on scan chains and ATPG
  • Production test based on generated and/or functional test vectors